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FEATURES

LTM4616 Dual 8A per Channel Low VIN DC/DC Module DESCRIPTION
The LTM(R)4616 is a complete dual 2-phase 8A per channel switch mode DC/DC power regulator system in a 15mm x 15mm surface mount LGA package. Included in the package are the switching controller, power FETs, inductor and all support components. Operating from an input voltage range of 2.7V to 5.5V, the LTM4616 supports two outputs within a voltage range of 0.6V to 5V, each set by a single external resistor. This high efficiency design delivers up to 8A continuous current (10A peak) for each output. Only bulk input and output capacitors are needed, depending on ripple requirement. The part can also be configured for a 2-phase single output at up to 16A. The low profile package (2.82mm) enables utilization of unused space on the back side of PC boards for high density point-of-load regulation. Fault protection features include overvoltage protection, overcurrent protection and thermal shutdown. The power module is offered in a space saving and thermally enhanced 15mm x 15mm x 2.82mm LGA package. The LTM4616 is Pb-free and RoHS compliant.
Different Combinations of Input and Output
Number of Inputs 2 2 1 1 Number of Outputs 2 1 2 1 IOUT (MAX) 8A, 8A 16A 8A, 8A 16A

Complete Dual DC/DC Regulator System Input Voltage Range: 2.7V to 5.5V Dual 8A Outputs, or Single 16A Output with a 0.6V to 5V Range Output Voltage Tracking and Margining 1.75% Total DC Output Error (-40C to 125C) Current Mode Control/Fast Transient Response Power-Good Tracking and Margining Overcurrent/Thermal Shutdown Protection Onboard Frequency Synchronization Spread Spectrum Frequency Modulation Multiphase Operation Selectable Burst Mode(R) Operation Output Overvoltage Protection Gold-Pad Finish Allows Soldering with Pb and PbFree Solder Paste Small Surface Mount Footprint, Low Profile (15mm x 15mm x 2.82mm) LGA Package
APPLICATIONS

Telecom, Networking and Industrial Equipment Storage and ATCA, PCI Express Cards Battery Operated Equipment
L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. Module is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 6724174.
TYPICAL APPLICATION
Dual Output DC/DC ModuleTM Regulator
VIN1 5V VIN1 10F VOUT1 FB1 LTM4616 ITHM1 VIN2 3.3V TO 5V VIN2 VOUT2 FB2 10F ITHM2 GND1 GND2
4616 TA01a
Efficiency vs Load Current
95 5VIN 3.3VOUT VOUT1 3.3V/8A 90 EFFICIENCY (%) 5VIN 2.5VOUT 85
2.21k
100F
VOUT2 2.5V/8A 3.09k 100F
80
75
70 0 2 4 6 LOAD CURRENT (A) 8
4616 TA01b
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LTM4616
(Note 1)
ABSOLUTE MAXIMUM RATINGS
VIN1, SVIN1, VIN2, SVIN2................................ -0.3V to 6V CLKOUT1, CLKOUT2 .................................... -0.3V to 2V PGOOD1, PLLLPF1, CLKIN1, PHMODE1, MODE1, PGOOD2, PLLLPF2, CLKIN2, PHMODE2, MODE2................................. -0.3V to VIN ITH1, ITHM1, RUN1, FB1, TRACK1, MGN1, BSEL1, ITH2 , ITHM2 , RUN2, FB2, TRACK2, MGN2, BSEL2 ......................................... -0.3V to VIN VOUT1, VOUT2 , SW1, SW2............................ -0.3V to VIN Internal Operating Temperature Range (Note 2) .............................................-40C to 125C Junction Temperature ........................................... 125C Storage Temperature Range...................-55C to 125C
PIN CONFIGURATION
TOP VIEW VIN2
M L K J
SGND2 & CONTROL
VOUT2
GND2
H G F
SW2, I/O & CONTROL
SGND1 & CONTROL VIN1
E D C B A 1 2 3 4 5 6 7 8 9 10 11 12
VOUT1
GND1
SW1, I/O & CONTROL LGA PACKAGE 144-LEAD (15mm x 15mm x 2.8mm)
TJMAX = 125C, JP = 2C/W, JC = 16C/W
ORDER INFORMATION
LEAD FREE FINISH LTM4616EV#PBF LTM4616IV#PBF TRAY LTM4616EV#PBF LTM4616IV#PBF PART MARKING* LTM4616V LTM4616V PACKAGE DESCRIPTION 144-Lead (15mm x 15mm x 2.82mm) LGA 144-Lead (15mm x 15mm x 2.82mm) LGA INTERNAL TEMPERATURE RANGE -40C to 125C -40C to 125C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
The denotes the specifications which apply over the -40C to 125C internal operating temperature range. TA = 25C, VIN = 5V unless otherwise noted. Per the typical application in Figure 18. Specified as each channel (Note 3).
SYMBOL VIN1(DC), VIN2(DC) PARAMETER Input DC Voltage CIN = 10F x 1, COUT = 100F Ceramic, 100F POSCAP RFB = 6.65k , VIN = 2.7V to 5.5V, IOUT = IOUT(DC)MIN to IOUT(DC)MAX (Note 4) SVIN Rising SVIN Falling CONDITIONS
ELECTRICAL CHARACTERISTICS
MIN 2.7 1.472
TYP
MAX 5.5
UNITS V V V V V
VOUT1(DC), VOUT2(DC) Output Voltage, Total Variation with Line and Load
1.49 1.49 2.2 2.0
1.508 1.516 2.35 2.15
1.464 2.05 1.85
Input Specifications VIN1(UVLO), VIN2(UVLO) Undervoltage Lockout Threshold
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LTM4616
ELECTRICAL CHARACTERISTICS
SYMBOL IQ(VIN1, VIN2) PARAMETER Input Supply Bias Current
The denotes the specifications which apply over the -40C to 125C internal operating temperature range. TA = 25C, VIN = 5V unless otherwise noted. Per the typical application in Figure 18. Specified as each channel (Note 3).
CONDITIONS VIN = 3.3V, VOUT = 1.5V, No Switching, Mode = VIN VIN = 3.3V, VOUT = 1.5V, No Switching, Mode = 0V VIN = 3.3V, VOUT = 1.5V, Switching Continuous VIN = 5V, VOUT = 1.5V, No Switching, Mode = VIN VIN = 5V, VOUT = 1.5V, No Switching, Mode = 0V VIN = 5V, VOUT = 1.5V, Switching Continuous Shutdown, RUN = 0, VIN = 5V MIN TYP 400 1.15 55 450 1.3 75 1 4.5 2.93 MAX UNITS A mA mA A mA mA A A A
IS(VIN1, VIN2) Output Specifications IOUT1(DC), IOUT2(DC)
Input Supply Current
VIN = 3.3V, VOUT = 1.5V, IOUT = 8A VIN = 5V, VOUT = 1.5V, IOUT = 8A
Output Continuous Current Range VOUT = 1.5V (Note 4) VIN = 3.3V, 5.5V VIN = 2.7V Line Regulation Accuracy Load Regulation Accuracy VOUT = 1.5V, VIN from 2.7V to 5.5V, IOUT = 0A VOUT = 1.5V (Note 4) VIN = 3.3V, 5.5V, ILOAD = 0A to 8A VIN = 2.7V, ILOAD = 0A to 5A IOUT = 0A, COUT = 100F X5R Ceramic, VIN = 5V, VOUT = 1.5V IOUT = 8A, VIN = 5V, VOUT = 1.5V COUT = 100F, VOUT = 1.5V, IOUT = 0A VIN = 3.3V VIN = 5V COUT = 100F, VOUT = 1.5V, VIN = 5V, IOUT = 1A Resistive Load, Track = VIN
0 0 0.1
8 5 0.25
A A %/V
VOUT1(LINE)/VOUT1 VOUT2(LINE)/VOUT2 VOUT1(LOAD)/VOUT1 VOUT2(LOAD)/VOUT2

0.3 0.3 10 1.25 0.75 10 10 100 20 1.5
0.5 0.5
% % mVP-P
VOUT1(AC), VOUT2(AC) Output Ripple Voltage fS1, fS2 fSYNC1, fSYNC2 VOUT1(START), VOUT2(START) tSTART1, tSTART2 VOUT1(LS), VOUT2(LS) tSETTLE1, tSETTLE2 IOUT1(PK), IOUT2(PK) Switching Frequency SYNC Capture Range Turn-On Overshoot
1.75 2.25
MHz MHz mV mV s mV
Turn-On Time
Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load, COUT = 100F Ceramic x2, 470F POSCAP , VIN = 5V, VOUT = 1.5V Settling Time for Dynamic Load Step Output Current Limit Load: 0% to 50% to 0% of Full Load, VIN = 5V, VOUT = 1.5V, COUT = 100F COUT = 100F VIN = 2.7V, VOUT = 1.5V VIN = 3.3V, VOUT = 1.5V VIN = 5V, VOUT = 1.5V IOUT = 0A, VOUT = 1.5V, VIN = 2.7V to 5.5V 0.590 0.587
10
s
8 11 13 0.596 0.596 90 0.2 0.602 0.606
A A A V V s A 1.7 1.5 V V V V V
Control Section FB1, FB2 SS Delay IFB VRUN1, VRUN2 TRACK1, TRACK2 RUN Pin On/Off Threshold Tracking Threshold (Rising) Tracking Threshold (Falling) Tracking Disable Threshold RUN Rising RUN Falling RUN = VIN RUN = 0V 1.4 1.3 Voltage at FB Pin Internal Soft-Start Delay
1.55 1.4 0.57 0.18 VIN - 0.5
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LTM4616 ELECTRICAL CHARACTERISTICS
SYMBOL RFBHI1, RFBHI2 PARAMETER Resistor Between VOUT and FB Pins Output Voltage Margining Percentage MGN = VIN , BSEL = 0V MGN = VIN , BSEL = VIN MGN = VIN , BSEL = Float MGN = 0V, BSEL = 0V MGN = 0V, BSEL = VIN MGN = 0V, BSEL = Float
The denotes the specifications which apply over the -40C to 125C internal operating temperature range. TA = 25C, VIN = 5V unless otherwise noted. Per the typical application in Figure 18. Specified as each channel (Note 3).
CONDITIONS MIN 9.95 TYP 10 10 4 9 14 -4 -9 -14 5 10 15 -5 -10 -15 6 11 16 -6 -11 -16 MAX 10.05 UNITS k % % % % % % %
VPGOOD1, VPGOOD2 PGOOD Range %Margining
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM4616E is guaranteed to meet performance specifications over the 0C to 125C internal operating temperature range. Specifications over the full -40C to 125C internal operating temperature range are assured by design, characterization and correlation with statistical process
controls. The LTM4616I is guaranteed to meet specifications over the full internal operating temperature range. Note that the maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3: Two channels are tested separately and the same testing conditions are applied to each channel. Note 4: See Output Current Derating curves for different VIN, VOUT and TA.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current
100 95 EFFICIENCY (%) EFFICIENCY (%) 90 85 80 75 70 0 2 CONTINUOUS MODE 100 95
Specified as Each Channel Efficiency vs Load Current
100 95 EFFICIENCY (%) 90 85 80 75 70 2.7VIN 1.0VOUT 2.7VIN 1.5VOUT 2.7VIN 1.8VOUT 0 1 4 3 2 5 LOAD CURRENT (A) 6 7
4616 G03
Efficiency vs Load Current
CONTINUOUS MODE
CONTINUOUS MODE
90 85 80 75 70 3.3VIN 1.2VOUT 3.3VIN 1.5VOUT 3.3VIN 1.8VOUT 3.3VIN 2.5VOUT 0 2 4 LOAD CURRENT 6 8
4616 G02
5VIN 1.2VOUT 5VIN 1.5VOUT 5VIN 1.8VOUT 5VIN 2.5VOUT 5VIN 3.3VOUT 4 LOAD CURRENT 6 8
4616 G01
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LTM4616
Specified as Each Channel
TYPICAL PERFORMANCE CHARACTERISTICS
Burst Mode Efficiency with 5V Input
100 90 EFFICIENCY (%) 80 70 60 50 40 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 LOAD CURRENT (A)
4616 G04
VIN to VOUT Step-Down Ratio
4.0 3.5 3.0 2.5 VOUT (V) 2.0 1.5 1.0 IOUT = 8A VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V 4.0 3.5 3.0 2.5 VOUT (V) 2.0 1.5 1.0 0.5 0 1 2 3 VIN (V) 4 0 5 6
4616 G05
VIN to VOUT Step-Down Ratio
IOUT = 5A VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V
VOUT = 1.5V VOUT = 2.5V VOUT = 3.3V
0.5 0
0
1
2
3 VIN (V)
4
5
6
4616 G06
Supply Current vs VIN
1.6 1.4 SUPPLY CURRENT (mA) 1.2 1 0.8 0.6 0.4 0.2 0 2.5 3 3.5 4 4.5 INPUT VOLTAGE (V) 5 5.5
4616 G07
Load Transient Response
Load Transient Response
VO = 1.2V PULSE-SKIPPING MODE
ILOAD 1A/DIV VOUT 50mV/DIV
ILOAD 1A/DIV VOUT 50mV/DIV
VO = 1.2V BURST MODE
4616 G08 VIN = 5V 20s/DIV VOUT = 3.3V 2A/s STEP COUT = 2 x 100F X5R, 470F 4V POSCAP 4616 G09 VIN = 5V 20s/DIV VOUT = 2.5V 2A/s STEP COUT = 2 x 100F X5R, 470F 4V POSCAP
Load Transient Response
Load Transient Response
Load Transient Response
ILOAD 1A/DIV VOUT 50mV/DIV
ILOAD 1A/DIV VOUT 50mV/DIV
ILOAD 1A/DIV VOUT 50mV/DIV
4616 G10 VIN = 5V 20s/DIV VOUT = 1.8V 2.5A/s STEP COUT = 2 x 100F X5R, 470F 4V POSCAP
4616 G11 VIN = 5V 20s/DIV VOUT = 1.5V 2.5A/s STEP COUT = 2 x 100F X5R, 470F 4V POSCAP
VIN = 5V 20s/DIV VOUT = 1.2V 2.5A/s STEP COUT = 2 x 100F X5R, 470F POSCAP
4616 G12
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LTM4616
Specified as Each Channel Load Regulation vs Current
0 -0.1 LOAD REGULATION (%) VIN = 5.5V 598 VIN 2V/DIV VFB (mV) 596 VIN = 2.7V 594 VIN = 5V 50s/DIV VOUT = 1.5V COUT = 100F NO LOAD AND 8A LOAD (DEFAULT 100s SOFT-START)
4616 G13
TYPICAL PERFORMANCE CHARACTERISTICS
Start-Up
602 600
VFB vs Temperature
VOUT 0.5V/DIV
VIN = 3.3V
-0.2 -0.3 -0.4 -0.5 -0.6 0 2 4 6 LOAD CURRENT (A) 8 FC MODE VIN = 3.3V VOUT = 1.5V
592 590 -50
-25
0
50 75 25 TEMPERATURE (C)
100
125
4616 G14
4616 G15
2.5V Output Current
3.0 2.5 OUTPUT VOLTAGE (V) 2.0 1.5 1.0 0.5 0 0 5 10 15 OUTPUT CURRENT (A) 20
4616 G16
Short-Circuit Protection (2.5V Short, No Load)
2V/DIV 2V/DIV VIN 5V/DIV 5V/DIV VOUT 5A/DIV 5A/DIV IOUT 5A/DIV
Short-Circuit Protection (2.5V Short, 4A Load)
VIN VOUT IOUT LOAD IOUT SHORT
VIN = 5V VOUT = 2.5V
50s/DIV
4616 G17
VIN = 5V VOUT = 2.5V
50s/DIV
4616 G18
PIN FUNCTIONS
VIN1, VIN2, (BANK1 and BANK2); (F1-F4, E1-E4, C1-C2, D1-D2) and (J1-J2, K1-K2, L1-L4, M1-M4): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between VIN pins and GND pins. VOUT1, VOUT2 (BANK3 and BANK6); (D9-D12, E9-E12, F9-F12) and (K9-K12, L9-L12, M9-M12): Power Output Pins. Apply output load between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins and GND pins. See Table 1. GND1 and GND2 (BANK2 and BANK5); (A1-A5, A12, B1B5, B7-B12, C3-C12, D3-D7) and (G1-G5, G12, H1-H5, H7-H12, J3-J12, K3-K7): Power Ground Pins for Both Input and Output Returns. SVIN1 and SVIN2 (E5 and L5): Signal Input Voltage for Each Channel. This pin is internally connected to VIN through a lowpass filter. SGND1 and SGND2 (F5 and M5): Signal Ground Pin for Each Channel. Return ground path for all analog and low power circuitry. Tie a single connection to the output capacitor GND in the application. See layout guidelines in Figure 17.
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LTM4616
Pin for Each Channel. Voltage tracking is enabled when the TRACK voltage is below 0.57V. If tracking is not desired, then connect the TRACK pin to SVIN. If TRACK is not tied to SVIN , then the TRACK pin's voltage needs to be below 0.18V before the chip shuts down even though RUN is already low. Do not float this pin. A resistor and capacitor can be applied to the TRACK pin to increase the soft-start time of the regulator. TRACK1 and TRACK2 can be tied together for parallel operation and tracking. See the Applications section. FB1 and FB2 (D8 and K8): The Negative Input of the Error Amplifier for Each Channel. Internally, this pin is connected to VOUT with a 10k precision resistor. Different output voltages can be programmed with an additional resistor between FB and GND pins. In PolyPhase(R) operation, tying the FB pins together allows for parallel operation. See Applications section for details. ITH1 and ITH2 (F8 and M8): Current Control Threshold and Error Amplifier Compensation Point for Each Channel. The current comparator threshold increases with this control voltage. Tie together in parallel operation. ITHM1 and ITHM2 (E7 and L7): Negative Input to the Internal ITH Differential Amplifier for Each Channel. Tie this pin to SGND for single phase operation on each channel. For PolyPhase operation, tie the master's ITHM to SGND while connecting all of the ITHM pins together at the master. PGOOD1 and PGOOD2 (A11 and G11): Output Voltage Power Good Indicator for Each Channel. Open-drain logic output that is pulled to ground when the output voltage is not within 10% of the regulation point. Power good is disabled during margining. RUN1 and RUN2 (F6 and M6): Run Control Pin. A voltage above 1.5V will turn on the module. SW1 and SW2 (B6 and H6): Switching Node of Each Channel That is Used for Testing Purposes. This can be connected to copper on the board for improved thermal performance. CLKOUT1 and CLKOUT2 (F7 and M7): Output Clock Signal for PolyPhase Operation. The phase of CLKOUT is determined by the state of the PHMODE pin.
PolyPhase is a registered trademark of Linear Technology Corporation.
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PIN FUNCTIONS
MODE1 and MODE2 (A8 and G8): Mode Select Input for Each Channel. Tying this pin high enables Burst Mode operation. Tying this pin low enables forced continuous operation. Floating this pin or tying it to VIN/2 enables pulse-skipping operation. CLKIN1 and CLKIN2 (A7 and G7): External Synchronization Input to Phase Detector for Each Channel. This pin is internally terminated to SGND with a 50k resistor. The phase-locked loop will force the internal top power PMOS turn on to be synchronized with the rising edge of the CLKIN signal. Connect this pin to SVIN to enable spread spectrum modulation. During external synchronization, make sure the PLLLPF pin is not tied to VIN or GND. PLLLPF1 and PLLLPF2 (E6 and L6): Phase-Locked Loop Lowpass Filter for Each Channel. An internal lowpass filter is tied to this pin. In spread spectrum mode, placing a capacitor here to SGND controls the slew rate from one frequency to the next. Alternatively, floating this pin allows normal running frequency at 1.5MHz, tying this pin to SVIN forces the part to run at 1.33 times its normal frequency (2MHz), tying it to ground forces the frequency to run at 0.67 times its normal frequency (1MHz). PHMODE1 and PHMODE2 (A9 and G9): Phase Selector Input for Each Channel. This pin determines the phase relationship between the internal oscillator and CLKOUT. Tie it high for 2-phase operation, tie it low for 3-phase operation, and float or tie it to VIN/2 for 4-phase operation. MGN1 and MGN2 (A10 and G10): Voltage Margining Pin for Each Channel. Tie this pin to VOUT to disable margining. For margining, connect a voltage divider from VIN to GND with the center point connected to the MGN pin for the specific channel. Each resistor should be close to 50k. Margin High is within 0.3V of VIN , and Margin Low is within 0.3V of GND. See the Applications section and Figure 18 for margining control. The specified tri-state drivers are capable of the high and low requirements for margining. BSEL1 and BSEL2 (A6 and G6): Margining Bit Select Pin for Each Channel. Tying BSEL low selects 5% margin value, tying it high selects 10% margin value. Floating it or tying it to VIN/2 selects 15% margin value. TRACK1 and TRACK2 (E8 and L8): Output Voltage Tracking
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LTM4616 SIMPLIFIED BLOCK DIAGRAM
VIN2
M L K J
SGND2 & CONTROL
VOUT2
GND2
H G F
SW2, I/O & CONTROL
SGND1 & CONTROL VIN1
E D C B A 1 2 3 4 5 6 7 8 9 10 11 12
4616 F01
VOUT1
GND1
SW1, I/O & CONTROL TOP VIEW OF LGA PINOUT LOOKING THROUGH COMPONENT
SVIN1 TRACK1 MGN1 BSEL1
INTERNAL FILTER 10F 10F 10F
+
VIN1 3V TO 5.5V CIN1 PGND1
VOUT1
M1 PGOOD1 MODE1 RUN1 CLKIN1 CLKOUT1 PHMODE1 ITH1 50k PLLLPF1 INTERNAL FILTER INTERNAL COMP 10k M2 10F POWER CONTROL L
SW1 VOUT1 1.5V 8A
+
COUT1
PGND1
ITHM1 PGND1 SGND1 SVIN2 TRACK2 MGN2 BSEL2
FB1 RSET1 6.65k
INTERNAL FILTER 10F 10F 10F
+
CIN2
VIN2 3V TO 5.5V
VOUT2
PGND2 M3
PGOOD2 MODE2 RUN2 CLKIN2 CLKOUT2 PHMODE2 ITH2 50k PLLLPF2 INTERNAL FILTER INTERNAL COMP 10k M4 10F POWER CONTROL L
SW2 VOUT2 1.2V 8A
+
COUT2
PGND2
ITHM2 PGND2 SGND2
FB2 RSET2 10k
4616 BD
Figure 1. Simplified LTM4616 Block Diagram
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LTM4616
SIMPLIFIED BLOCK DIAGRAM
Table 1. Decoupling Requirements. TA = 25C, Block Diagram Configuration.
SYMBOL CIN1 CIN2 COUT1 COUT2 PARAMETER External Input Capacitor Requirement (VIN1 = 2.7V to 5.5V, VOUT1 = 1.5V) (VIN2 = 2.7V to 5.5V, VOUT2 = 2.5V) External Output Capacitor Requirement (VIN1 = 2.7V to 5.5V, VOUT1 = 1.5V) (VIN2 = 2.7V to 5.5V, VOUT2 = 2.5V) CONDITIONS IOUT1 = 8A IOUT2 = 8A IOUT1 = 8A IOUT2 = 8A MIN TYP 22 22 100 100 MAX UNITS F F F F
OPERATION
The LTM4616 is a dual-output standalone nonisolated switching mode DC/DC power supply. It can provide two 8A outputs with few external input and output capacitors. This module provides precisely regulated output voltages programmable via external resistors from 0.6VDC to 5VDC over 2.7V to 5.5V input voltages. The typical application schematic is shown in Figure 18. The LTM4616 has integrated constant frequency current mode regulators and built-in power MOSFET devices with fast switching speed. The typical switching frequency is 1.5MHz. For switching noise sensitive applications, it can be externally synchronized from 0.75MHz to 2.25MHz. Even spread spectrum switching can be implemented in the design to reduce noise. With current mode control and internal feedback loop compensation, the LTM4616 module has sufficient stability margins and good transient performance with a wide range of output capacitors, even with all ceramic output capacitors. Current mode control provides cycle-by-cycle fast current limit and thermal shutdown in an overcurrent condition. Internal overvoltage and undervoltage comparators pull the open-drain PGOOD output low if the output feedback voltage exits a 10% window around the regulation point. The power good pins are disabled during margining. Pulling the RUN pins below 1.3V forces the regulators into a shutdown state, by turning off both MOSFETs. The TRACK pin is used for programming the output voltage ramp and voltage tracking during start-up. See Applications Information section. The LTM4616 is internally compensated to be stable over all operating conditions. Table 3 provides a guideline for input and output capacitances for several operating conditions. The Linear Technology Module Power Design Tool will be provided for transient and stability analysis. The FB pin is used to program the output voltage with a single external resistor to ground. Multiphase operation can be easily employed with the synchronization and phase mode controls. Up to 12 phases can be cascaded to run simultaneously with respect to each other by programming the PHMODE pin to different levels. The LTM4616 has clock in and clock out for poly phasing multiple devices or frequency synchronization. High efficiency at light loads can be accomplished with selectable Burst Mode operation using the MODE pin. These light load features will accommodate battery operation. Efficiency graphs are provided for light load operation in the Typical Performance Characteristics section. Output voltage margining is supported, and can be programed from 5% to 15% using the MGN and BSEL pins.
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LTM4616 APPLICATIONS INFORMATION
The typical LTM4616 application circuit is shown in Figure 18. External component selection is primarily determined by the maximum load current and output voltage. Refer to Table 3 for specific external capacitor requirements for a particular application. VIN to VOUT Step-Down Ratios There are restrictions in the maximum VIN to VOUT stepdown ratio that can be achieved for a given input voltage. Each output of the LTM4616 is 100% duty cycle, but the VIN to VOUT minimum drop out is still shown as a function of its load current. For 5V input, all outputs can deliver 8A. For 3.3V input, all outputs can deliver 8A, except 2.5VOUT which is limited to 6A. All outputs derived from 2.7V input are limited to 5A. Output Voltage Programming The PWM controller has an internal 0.596V reference voltage. As shown in the Block Diagram, a 10k 0.5% internal feedback resistor connects VOUT and FB pins together. The output voltage will default to 0.596V with no feedback resistor. Adding a resistor RFB from FB pin to GND programs the output voltage: VOUT = 0.596V * 10k + RFB RFB step is required up to the 4A level. A 47F to 100F surface mount aluminum electrolytic bulk capacitor can be used for more input bulk capacitance. This bulk input capacitor is only needed if the input source impedance is compromised by long inductive leads, traces or not enough source capacitance. If low impedance power planes are used, then this 47F capacitor is not needed. For a buck converter, the switching duty-cycle can be estimated as: D= VOUT VIN
Without considering the inductor current ripple, the RMS current of the input capacitor can be estimated as: ICIN(RMS) = IOUT(MAX) % * D * (1- D)
In the above equation, % is the estimated efficiency of the power module so the RMS input current at the worst case for 8A maximum current is about 4A. The bulk capacitor can be a switcher-rated electrolytic aluminum capacitor, polymer capacitor for bulk input capacitance. Each internal 10F ceramic input capacitor is typically rated for 2 amps of RMS ripple current. Output Capacitors
Table 2. FB Resistor vs Various Output Voltages
VOUT RFB 0.596V Open 1.2V 10k 1.5V 6.65k 1.8V 4.87k 2.5V 3.09k 3.3V 2.21k
For parallel operation of N the below equation can be used to solve for RFB . Tying the FB pins together for each parallel output: RFB = 10k / N VOUT -1 0.596
Input Capacitors The LTM4616 module should be connected to a low AC impedance DC source. For each regulator, three 10F ceramic capacitors are included inside the module. Additional input capacitors are only needed if a large load
The LTM4616 is designed for low output voltage ripple noise. The bulk output capacitors defined as COUT are chosen with low enough effective series resistance (ESR) to meet the output voltage ripple and transient requirements. COUT can be a low ESR tantalum capacitor, low ESR polymer capacitor or ceramic capacitor. The typical output capacitance range is from 47F to 220F. Additional output filtering may be required by the system designer, if further reduction of output ripples or dynamic transient spikes is required. Table 3 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 3A/s transient. The table optimizes total equivalent ESR and total bulk capacitance to optimize the transient performance. Stability criteria are considered in the Table 3 matrix, and the Linear Technology Module Power Design Tool will be provided for stability analysis.
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LTM4616
APPLICATIONS INFORMATION
Table 3. Output Voltage Response Versus Component Matrix (Refer to Figure 18) 0A to 3A Load Step
TYPICAL MEASURED VALUES COUT1 VENDORS VALUE TDK 22F, 6.3V Murata 22F, 16V TDK 100F, 6.3V Murata 100F, 6.3V VOUT (V) 1.0 1.0 1.0 1.0 1.2 1.2 1.2 1.2 1.5 1.5 1.5 1.5 1.5 1.5 1.8 1.8 CIN (CERAMIC) 10F 10F 10F 10F 10F 10F 10F 10F 10F 10F 10F 10F 10F 10F 10F 10F CIN (BULK)* 100F 100F 100F 100F 100F 100F 100F 100F 100F 100F 100F 100F 100F 100F 100F 100F PART NUMBER C3216X7S0J226M GRM31CR61C226KE15L C4532X5R0J107MZ GRM32ER60J107M COUT1 (CERAMIC) 100F x 2 100F x 2 100F x 2 22F x 1 100F x 2 22F x 1 100F x 2 22F x 1 100F x 2 22F x 1 100F x 1 22F x 1 100F x 2 22F x 1 100F x 1 22F x 1 COUT2 (BULK) 470F COUT2 VENDORS Sanyo POSCAP CIN (BULK) VENDORS Sanyo VALUE 470F, 4V VALUE 100F, 10V PART NUMBER 4TPE470M PART NUMBER 10CE100FH
470F 470F 470F 470F 470F 470F 470F
ITH None None None None None None None None None None None None None None None None
C1 None None None None None None None None None None None None None None None None None None None None None None None None None None
C3 None None None None None None None None None None None None None None None None None None None None None None None None None None
VIN (V) 5 5 2.7 2.7 5 5 2.7 2.7 5 5 3.3 3.3 2.7 2.7 5 5 3.3 3.3 2.7 2.7 5 5 3.3 3.3 5 5
DROOP (mV) 20 30 30 25 20 20 30 30 32 25 22 25 30 25 42 25 35 25 35 35 35 32 50 32 65 40
PEAK-TO- PEAK DEVIATION (mV) 40 60 60 50 40 41 60 60 64 50 42 50 60 50 80 50 70 50 70 20 40 65 100 65 135 87
RECOVERY TIME (s) 40 25 25 25 25 25 20 25 20 25 25 25 25 25 25 30 30 30 30 30 30 40 30 40 30 40
LOAD STEP (A/s) 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5
RFB (k) 14.7 14.7 14.7 14.7 10 10 10 10 6.65 6.65 6.65 6.65 6.65 6.65 4.87 4.87 4.87 4.87 4.87 4.87 3.09 3.09 3.09 3.09 2.21 2.21
1.8 10F 100F 100F x 2 None 1.8 10F 100F 22F x 1 470F None 1.8 10F 100F 100F x 2 None 1.8 10F 100F 22F x 1 470F None 2.5 10F 100F 100F x 1 None 2.5 10F 100F 22F x 1 470F None 2.5 10F 100F 100F x 1 None 2.5 10F 100F 22F x 1 470F None 3.3 10F 100F 100F x 1 None 3.3 10F 100F 22F x 1 470F None *Bulk capacitance is optional if VIN has very low input impedance.
Multiphase operation will reduce effective output ripple as a function of the number of phases. Application Note 77 discusses this noise reduction versus output ripple current cancellation, but the output capacitance will be more a function of stability and transient response. The Linear Technology Module Power Design Tool will calculate the output ripple reduction as the phase number increases by N times.
Burst Mode Operation The LTM4616 is capable of Burst Mode operation on each regulator in which the power MOSFETs operate intermittently based on load demand, thus saving quiescent current. For applications where maximizing the efficiency at very light loads is a high priority, Burst Mode operation should be applied. To enable Burst Mode operation, simply tie the MODE pin to VIN. During this operation, the peak current of the inductor is set to approximately 20% of
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the maximum peak current value in normal operation even though the voltage at the ITH pin indicates a lower value. The voltage at the ITH pin drops when the inductor's average current is greater than the load requirement. As the ITH voltage drops below 0.2V, the BURST comparator trips, causing the internal sleep line to go high and turn off both power MOSFETs. In Burst Mode operation, the internal circuitry is partially turned off, reducing the quiescent current to about 450A for each output. The load current is now being supplied from the output capacitors. When the output voltage drops, causing ITH to rise above 0.25V, the internal sleep line goes low, and the LTM4616 resumes normal operation. The next oscillator cycle will turn on the top power MOSFET and the switching cycle repeats. Each regulator can be configured for Burst Mode operation. Pulse-Skipping Mode Operation In applications where low output ripple and high efficiency at intermediate currents are desired, pulse-skipping mode should be used. Pulse-skipping operation allows the LTM4616 to skip cycles at low output loads, thus increasing efficiency by reducing switching loss. Floating the MODE pin or tying it to VIN /2 enables pulse-skipping operation. This allows discontinuous conduction mode (DCM) operation down to near the limit defined by the chip's minimum on-time (about 100ns). Below this output current level, the converter will begin to skip cycles in order to maintain output regulation. Increasing the output load current slightly, above the minimum required for discontinuous conduction mode, allows constant frequency PWM. Each regulator can be configured for Pulse-Skipping mode. Forced Continuous Operation In applications where fixed frequency operation is more critical than low current efficiency, and where the lowest output ripple is desired, forced continuous operation should be used. Forced continuous operation can be enabled by tying the MODE pin to GND. In this mode, inductor current is allowed to reverse during low output loads, the ITH voltage is in control of the current comparator threshold throughout, and the top MOSFET always turns on with each oscillator pulse. During start-up, forced continuous mode is disabled and inductor current is prevented from reversing until the LTM4616's output voltage is in regulation. Each regulator can be configured for Forced Continuous mode. Multiphase Operation For output loads that demand more than 8A of current, two outputs in LTM4616 or even multiple LTM4616s can be cascaded to run out-of-phase to provide more output current without increasing input and output voltage ripple. The CLKIN pin allows the LTC4616 to synchronize to an external clock (between 0.75MHz and 2.25MHz) and the internal phase-locked loop allows the LTM4616 to lock onto CLKIN's phase as well. The CLKOUT signal can be connected to the CLKIN pin of the following LTM4616 stage to line up both the frequency and the phase of the entire system. Tying the PHMODE pin to SVIN , SGND or SVIN /2 (floating) generates a phase difference (between CLKIN and CLKOUT) of 180, 120 or 90 respectively, which corresponds to a 2-phase, 3-phase or 4-phase operation. A total of 12 phases can be cascaded to run simultaneously with respect to each other by programming the PHMODE pin of each LTM4616 to different levels. For a 6-phase example in Figure 2, the 2nd stage that is 120 out-ofphase from the 1st stage can generate a 240 (PHMODE = 0) CLKOUT signal for the 3rd stage, which then can generate a CLKOUT signal that's 420, or 60 (PHMODE = SVIN) for the 4th stage. With the 60 CLKIN input, the next two stages can shift 120 (PHMODE = 0) for each to generate a 300 signal for the 6th stage. Finally, the signal with a 60 phase shift on the 6th stage (PHMODE is floating) goes back to the 1st stage. Figure 3 shows the configuration for 12-phase operation. A multiphase power supply significantly reduces the amount of ripple current in both the input and output capacitors. The RMS input ripple current is reduced by, and the effective ripple frequency is multiplied by, the number of phases used (assuming that the input voltage is greater than the number of phases used times the output voltage). The output ripple amplitude is also reduced by the number of phases used. The LTM4616 device is an inherently current mode controlled device, so parallel modules will have very good
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LTM4616
(420) 60 +180 CLKIN CLKOUT PHMODE PHASE 2 +120
APPLICATIONS INFORMATION
0 CLKIN CLKOUT PHMODE PHASE 1 +120 120 CLKIN CLKOUT PHMODE PHASE 3 +120 240 CLKIN CLKOUT PHMODE PHASE 5 180 CLKIN CLKOUT PHMODE PHASE 4 +120 300 CLKIN CLKOUT PHMODE PHASE 6
SVIN
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Figure 2. 6-Phase Operation
(390) 30 +120 CLKIN CLKOUT PHMODE PHASE 2 +90
0 CLKIN CLKOUT PHMODE PHASE 1 +90
90 CLKIN CLKOUT PHMODE PHASE 4 +90
180 CLKIN CLKOUT PHMODE PHASE 7 +90
270 CLKIN CLKOUT PHMODE PHASE 10
120 CLKIN CLKOUT PHMODE PHASE 5 +90
210 CLKIN CLKOUT PHMODE PHASE 8 +90
300 CLKIN CLKOUT PHMODE PHASE 11 +120
(420) 60 CLKIN CLKOUT PHMODE PHASE 3 +90
150 CLKIN CLKOUT PHMODE PHASE 6
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+90
240 CLKIN CLKOUT PHMODE PHASE 9 +90
330 CLKIN CLKOUT PHMODE PHASE 12
Figure 3. 12-Phase Operation
current sharing. This will balance the thermals on the design. Tie the ITH pins of each LTM4616 together to share the current evenly. To reduce ground potential noise, tie the ITHM pins of all LTM4616s together and then connect to the SGND of the master at the point it connects to the output capacitor GND. See layout guideline in Figure 17. Figure 19 shows a schematic of the parallel design. The FB pins of the parallel module are tied together. Input RMS Ripple Current Cancellation Application Note 77 provides a detailed explanation of multiphase operation. The input RMS ripple current cancellation mathematical derivations are presented, and a graph is displayed representing the RMS ripple current reduction as a function of the number of interleaved phases. Figure 4 shows this graph.
Spread Spectrum Operation Switching regulators can be particularly troublesome where electromagnetic interference (EMI) is concerned. Switching regulators operate on a cycle-by-cycle basis to transfer power to an output. In most cases, the frequency of operation is fixed based on the output load. This method of conversion creates large components of noise at the frequency of operation (fundamental) and multiples of the operating frequency (harmonics). To reduce this noise, the LTM4616 can run in spread spectrum operation by tying the CLKIN pin to SVIN . In spread spectrum operation, the LTM4616's internal oscillator is designed to produce a clock pulse whose period is random on a cycle-by-cycle basis but fixed
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LTM4616 APPLICATIONS INFORMATION
0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 1-PHASE 2-PHASE 3-PHASE 4-PHASE 6-PHASE
RMS INPUT RIPPLE CURRENT DC LOAD CURRENT
0.1 0.15
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 DUTY FACTOR (VO/VIN) 4616 F04
Figure 4. Normalized Input RMS Ripple Current vs Duty Factor for One to Six Channels (Phases)
between 70% and 130% of the nominal frequency. This has the benefit of spreading the switching noise over a range of frequencies, thus significantly reducing the peak noise. Spread spectrum operation is disabled if CLKIN is tied to ground or if it's driven by an external frequency synchronization signal. A capacitor value of 0.01F to 0.1F be placed from the PLLLPF pin to ground to control the slew rate of the spread spectrum frequency change. Output Voltage Tracking Output voltage tracking can be programmed externally using the TRACK pin. The output can be tracked up and down with another regulator. The master regulator's output is divided down with an external resistor divider that is the same as the slave regulator's feedback divider to implement coincident tracking. The LTM4616 uses an accurate 10k resistor internally for the top feedback resistor. Figure 5 shows an example of coincident tracking: Slave = 1+ 10k * VTRACK R TA
VTRACK is the track ramp applied to the slave's track pin. VTRACK has a control range of 0V to 0.596V, or the internal reference voltage. When the master's output is divided down with the same resistor values used to set the slave's output, then the slave will coincident track with the master until it reaches its final value. The master will continue to its final value from the slave's regulation point. Voltage tracking is disabled when VTRACK is more than 0.596V. RTA in Figure 5 will be equal to RFB for coincident tracking. The track pin of the master can be controlled by an external ramp or by RSR and CSR in Figure 5 referenced to VIN . The RC ramp time can be programmed using equation: t = - ln 1- 0.596V * RSR * CSR VIN
Ratiometric tracking can be achieved by a few simple calculations and the slew rate value applied to the master's track pin. As mentioned above, the TRACK pin has a control range from 0V to 0.596V. The master's TRACK pin slew
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In ratiometric tracking, a different slew rate maybe desired for the slave regulator. RTB can be solved for when SR is slower than MR. Make sure that the slave supply slew rate is chosen to be fast enough so that the slave output voltage will reach it final value before the master output. For example: MR = 3.3V/ms and SR = 1.5V/ms. Then RTB = 22.1k. Solve for RTA to equal to 4.87k.
APPLICATIONS INFORMATION
rate is directly equal to the master's output slew rate in Volts/Time: MR * 10k = R TB SR where MR is the master's output slew rate and SR is the slave's output slew rate in Volts/Time. When coincident tracking is desired, then MR and SR are equal, thus RTB is equal to 10k. RTA is derived from equation: R TA = 0.596V VFB VFB VTRACK + - 10k RFB R TB
MASTER OUTPUT OUTPUT VOLTAGE (V)
SLAVE OUTPUT
where VFB is the feedback voltage reference of the regulator and VTRACK is 0.596V. Since RTB is equal to the 10k top feedback resistor of the slave regulator in equal slew rate or coincident tracking, then RTA is equal to RTB with VFB = VTRACK . Therefore RTB = 10k and RTA = 6.65k in Figure 5. Figure 6 shows the output voltage for coincident tracking.
TIME
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Figure 6. Output Voltage Coincident Tracking
CLKIN1 VIN 4V TO 5.5V SW1 CLKIN1 CLKOUT1 CLKIN2 CLKOUT2
VIN1 SVIN1 RUN RUN1
VOUT1 FB1 ITH1 ITHM1 PGOOD1 BSEL1 RFB1 2.21k 100F
MASTER 3.3V/7A
10F RSR
PLLLPF1 MODE1 PHMODE1 TRACK1 LTM4616
MGN1 VOUT2 FB2 ITH2 ITHM2 PGOOD2 BSEL2 MGN2 PGOOD BSEL RFB2 6.65k 100F 100F SLAVE 1.5V/8A
CSR RUN MASTER 3.3V RTB 10k RTA 6.65k 10F
VIN2 SVIN2 RUN2 PLLLPF2 MODE2 PHMODE2 TRACK2 SW2 SGND1 GND1 SGND2 GND2
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FOR TRACK1: 1. TIE TO VIN TO DISABLE TRACK WITH DEFAULT 100s SOFT START 2. APPLY A CONTROL RAMP WITH RSR AND CSR TIED TO VIN WITH t = -(ln(1-0.596/VIN) * RSR * CSR)) 3. APPLY AN EXTERNAL TRACKING RAMP DIRECTLY
Figure 5. Dual Outputs (3.3V and 1.5V) with Tracking
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LTM4616 APPLICATIONS INFORMATION
MGN pin is low, it forces negative margining, in which the output voltage is below the regulation point. When MGN is high, the output voltage is forced to above the regulation point. The MGN pin with a voltage divider is driven with a small tri-state gate as shown in Figure 18 for three margin states, (High, Low, and No Margin). The amount of output voltage margining is determined by the BSEL pin. When BSEL is low, it's 5%. When BSEL is high, it's 10%. When BSEL is floating, it's 15%. When margining is active, the internal output overvoltage and undervoltage comparators are disabled and PGOOD remains high. Thermal Considerations and Output Current Derating The power loss curves in Figures 7 and 8 can be used in coordination with the load current derating curves in Figures 9 to16 for calculating an approximate JA thermal resistance for the LTM4616 with various heatsinking and airflow conditions. Both LTM4616 outputs are placed in parallel for a total output current of 16A, and the power loss curves are plotted for specific output voltages up to 16A. The derating curves are plotted with each output at 8A combined for a total of 16A. The output voltages are 1.2V, 2.5V and 3.3V. These are chosen to include the lower and higher output voltage ranges for correlating the thermal resistance. Thermal models are derived from several temperature measurements in a controlled temperature chamber along with thermal modeling analysis. The junction temperatures are monitored while ambient temperature increased with and without airflow. The junctions are maintained at ~115C while lowering output
8 7 6 POWER LOSS (W) 5 4 3 2 3.3VIN 1.2VOUT 3.3VIN 2.5VOUT 0 4 8 LOAD CURRENT (A)
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For applications that do not require tracking or sequencing, simply tie the TRACK pin to SVIN to let RUN control the turn on/off. Connecting TRACK to SVIN also enables the ~100s of internal soft-start during start-up. Power Good The PGOOD pin is an open-drain pin that can be used to monitor valid output voltage regulation. This pin monitors a 10% window around the regulation point. As shown in Figure 20, the sequencing function can be realized in a dual output application by controlling the RUN pins and the PGOOD signals from each other. The 1.5V output begins its soft starting after the PGOOD signal of 3.3V output becomes high, and 3.3V output starts its shutdown after the PGOOD signal of 1.5V output becomes low. This can be applied to systems that require voltage sequencing between the core and sub-power supplies. Stability Compensation The module has already been internally compensated for all output voltages. Table 2 is provided for most application requirements. The Linear Technology Module Power Design Tool will be provided for other control loop optimization. Output Margining For a convenient system stress test on the LTM4616's output, the user can program each output to 5%, 10% or 15% of its normal operational voltage. The MGN pin is tied to the output voltage to disable margining. When the
8 7 6 POWER LOSS (W) 5 4 3 2 1 0
1 0 0 4 8
5VIN 1.2VOUT 5VIN 3.3VOUT 12 16
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12
16
LOAD CURRENT (A)
Figure 7. 1.2V, 2.5V Power Loss
Figure 8. 1.2V, 3.3V Power Loss
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16 14 400 LFM LOAD CURRENT (A) LOAD CURRENT (A) 16 14 400 LFM 12 10 0 LFM 8 6 4 2 200 LFM 400 LFM 12 10 0 LFM 8 6 4 2 0 40 50 90 100 AMBIENT TEMPERATURE (C) 60 70 80 110 25 55 70 85 40 100 AMBIENT TEMPERATURE (C) 115
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APPLICATIONS INFORMATION
16 14 LOAD CURRENT (A) 12 10 8 6 4 2 0 25 55 70 85 40 100 AMBIENT TEMPERATURE (C) 115
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0 LFM 200 LFM
200 LFM
0
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Figure 9. 5VIN to 3.3VOUT with No Heatsink
16 14 LOAD CURRENT (A) LOAD CURRENT (A) 12 10 0 LFM 8 6 4 2 0 40 50 90 100 AMBIENT TEMPERATURE (C) 60 70 80 110 200 LFM 400 LFM 16 14
Figure 10. 5VIN to 1.2VOUT with No Heatsink
16 14 LOAD CURRENT (A) 12
Figure 11. 5VIN to 3.3VOUT with BGA Heatsink
12 10 8 6 4 2 0 40 100 AMBIENT TEMPERATURE (C) 60 80 120
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0 LFM
400 LFM
400 LFM 10 8 6 4 2 0 30 50 70 90 110
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0 LFM 200 LFM
200 LFM
AMBIENT TEMPERATURE (C)
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Figure 12. 5VIN to 1.2VOUT with BGA Heatsink
Figure 13. 3.3VIN to 1.2VOUT with No Heatsink
Figure 14. 3.3VIN to 2.5VOUT with No Heatsink
current or power while increasing ambient temperature. The 115C is chosen to allow for a 10C margin window relative to the maximum 125C. The decreased output current will decrease the internal module loss as ambient temperature is increased. The power loss curves in Figures 7 and 8 show this amount of power loss as a function of load current that is specified with both channels in parallel. The monitored junction temperature of 115C minus the ambient operating temperature specifies how much module temperature rise can be allowed. As an example, in Figure 10 the load current is derated to 10A at ~ 80C and the power loss for the 5V to 1.2V at 10A output is ~3W. If the 80C ambient temperature is subtracted from the 115C maximum junction temperature, then difference of 35C divided by 3.2W equals a 10.9C/W. Table 4 specifies
a 10.5C/W value which is very close. Table 4 and Table 5 provide equivalent thermal resistances for 1.2V and 3.3V outputs, with and without airflow and heatsinking. The printed circuit board is a 1.6mm thick four layer board with two ounce copper for the two outer layers and one ounce copper for the two inner layers. The PCB dimensions are 95mm x 76mm. The BGA heatsinks are listed below Table 5. At load currents on each channel from 3A to 8A (6A to16A in parallel on the derate curves); the thermal resistance values in Tables 4 and 5 are closely accurate. As the load currents go below the 3A level on each channel the thermal resistance starts to increase due to the reduced power loss on the board. The approximate thermal resistance values for these lower currents is 15C/W.
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LTM4616 APPLICATIONS INFORMATION
16 14 LOAD CURRENT (A) LOAD CURRENT (A) 12 400 LFM 10 0 LFM 8 6 4 2 0 40 50 100 110 120 AMBIENT TEMPERATURE (C)
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16 14 12 10 0 LFM 8 6 4 2 60 70 80 90 0 30 50 70 90 110
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400 LFM
200 LFM
200 LFM
AMBIENT TEMPERATURE (C)
Figure 15. 3.3VIN 1.2VOUT with BGA Heatsink Table 4. 1.2V Output
DERATING CURVE Figures 10, 13 Figures 10, 13 Figures 10, 13 Figures 12, 15 Figures 12, 15 Figures 12, 15 VIN (V) 3.3, 5 3.3, 5 3.3, 5 3.3, 5 3.3, 5 3.3, 5 POWER LOSS CURVE Figures 7, 8 Figures 7, 8 Figures 7, 8 Figures 7, 8 Figures 7, 8 Figures 7, 8
Figure 16. 3.3VIN 2.5VOUT with BGA Heatsink
AIR FLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink JA (C/W) 10.5 8.0 7.0 9.5 6.3 5.2
Table 5. 3.3V Output
DERATING CURVE Figure 9 Figure 9 Figure 9 Figure 11 Figure 11 Figure 11 Heatsink Manufacturer Wakefield Engineering AAVID Thermalloy Part No: LTN20069 Part No: 375424B000346 Phone Number: 603-635-2800 Phone Number: 603-224-9988 VIN (V) 5 5 5 5 5 5 POWER LOSS CURVE Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 AIR FLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink JA (C/W) 10.5 8.0 7.0 9.8 7.0 5.5
Safety Considerations The LTM4616 modules do not provide isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. The device does support thermal shutdown and overcurrent protection.
Layout Checklist/Example The high integration of LTM4616 makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout considerations are still necessary. * Use large PCB copper areas for high current paths, including VIN1, VIN2 , PGND1 and PGND2, VOUT1 and VOUT2. It helps to minimize the PCB conduction loss and thermal stress.
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* Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND to GND underneath the unit. * For parallel modules, tie the ITH, FB and ITHM pins together. Use an internal layer to closely connect these pins together. All of the ITHM pins connect to the SGND of the master regulator, then the master SGND connects to GND. Figure 17 gives a good example of the recommended layout.
VOUT1 VIA TO GND 2X CONTROL1
M L
APPLICATIONS INFORMATION
* Place high frequency ceramic input and output capacitors next to the VIN, GND and VOUT pins to minimize high frequency noise. * Place a dedicated power ground layer underneath the unit. * To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. * Do not put vias directly on the pads, unless they are capped or plated over.
VIN1
COUT2
VOUT1
VIN1
CIN1
K J H G
GND1
GND1 CONTROL1 & 2
F
COUT2 VOUT2
VIN2
E
CIN2
D C B
GND2
GND2
A 1 2 3 4 5 6 7 8 9 10 11 12
GND2
CONTROL2 LTM4616 TOP VIEW
GND2
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Figure 17. Recommended PCB Layout
CLKIN1 VIN1 3V TO 5.5V VIN1 SVIN1 RUN1 PLLLPF1 MODE1 PHMODE1 TRACK1 VIN2 3V TO 5.5V VIN2 SVIN2 RUN2 PLLLPF2 BSEL: HIGH = 10% FLOAT = 15% LOW = 5% OE H H L IN H L X OUT H L Z MODE2 A1, A2 PERICOM P174ST1G126CEX TOSHIBA TC75Z126AFE MGN MARGIN VALUE PHMODE2 TRACK2 SW2 SGND1 GND1 SGND2 GND2
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SW1
CLKIN1
CLKOUT1 CLKIN2
CLKOUT2
VOUT1 FB1 ITH1 ITHM1 PGOOD1 BSEL1 4.87k
10F
VOUT1 1.8V/8A 100F
VIN PGOOD BSEL R4 50k VOUT2 1.5V/8A 100F 2 VIN PGOOD BSEL R2 50k R1 50k OUT OUT
LTM4616
MGN1 VOUT2 FB2 ITH2 ITHM2 PGOOD2 BSEL2 MGN2 6.65k R3 50k
GND 5 PIN SC70 PACKAGE
10F
+ Value of BSEL Selection H - Value of BSEL Selection L VIN/2 No Margin
GND 5 PIN SC70 PACKAGE
Figure 18. Typical 3.2V to 5VIN, to 1.8V, 1.5V Outputs
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A1 V+
+ -
A2 V+
IOE IIN
IOE IIN
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LTM4616 APPLICATIONS INFORMATION
VIN 3V TO 5.5V 10F RUN ENABLE VIN1 SVIN1 RUN1 PLLLPF1 MODE1 PHMODE1 TRACK1 VIN2 10F SVIN2 RUN2 PLLLPF2 MODE2 PHMODE2 TRACK2 SW2 SGND1 GND1 SGND2 GND2
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SW1
CLKIN1
CLKOUT1 CLKIN2
CLKOUT2
VOUT1 FB1 ITH1 ITHM1 PGOOD1 BSEL1 3.32k 100F
VOUT 1.5V/16A
LTM4616
MGN1 VOUT2 FB2 ITH2 ITHM2 PGOOD2 BSEL2 MGN2 100F 100F
Figure 19. LTM4616 Two Outputs Parallel, 1.5V at 16A Design
CLKIN VIN 5V 22F SHDNB 100k VIN1 SVIN1 RUN1 PLLLPF1 MODE1 PGOOD2 PHMODE1 TRACK1 VIN2 SVIN2 RUN2 100k PLLLPF2 MODE2 PGOOD1 PHMODE2 TRACK2 SW2 SGND1 GND1 SGND2 GND2
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SW1
CLKIN1
CLKOUT1 CLKIN2
CLKOUT2
VOUT1 FB1 ITH1 ITHM1 PGOOD1 BSEL1 100k SVIN1 2.21k
VOUT1 3.3V/7A
100F
LTM4616
MGN1 VOUT2 FB2 ITH2 ITHM2 PGOOD2 BSEL2 MGN2 100k SVIN2
VOUT2 1.5V/8A 100F 6.65k 100F
SHDNB 3.3V 1.5V
Figure 20. LTM4616 Output Sequencing Application
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APPLICATIONS INFORMATION
VIN 3V TO 6.5V VIN1 10F 6.3V SVIN1 RUN1 PLLLPF1 MODE1 PHMODE1 TRACK INPUT OR 3VIN 10F 6.3V TRACK1 VIN2 SVIN2 RUN2 PLLLPF2 MODE2 PHMODE2 TRACK2 SW2 SGND1 GND1 SGND2 GND2 LTM4616 SW1 CLKIN1 CLKOUT1 CLKIN2 CLKOUT2 VOUT1 FB1 ITH1 ITHM1 PGOOD1 BSEL1 MGN1 VOUT2 FB2 ITH2 ITHM2 PGOOD2 BSEL2 MGN2 SANYO POSCAP 10m 2.47k
+
C1 470F 6.3V
VOUT 1.2V AT 32A
+
C2 470F 6.3V
VIN1 10F 6.3V SVIN1 RUN1
SW1
CLKIN1
CLKOUT1 CLKIN2
CLKOUT2
VOUT1 FB1 ITH1 ITHM1 PGOOD1 BSEL1
+
C3 470F 6.3V
PLLLPF1 MODE1 PHMODE1 TRACK1 VIN2 10F 6.3V SVIN2 RUN2 PLLLPF2 MODE2 PHMODE2 TRACK2 SW2 SGND1 GND1 SGND2 GND2 LTM4616
MGN1 VOUT2 FB2 ITH2 ITHM2 PGOOD2 BSEL2 MGN2
4616 F21
+
C5 22F 6.3V
+
C4 22F 6.3V
OUT GND
R2 50k BSEL: HIGH = 10% FLOAT = 15% LOW = 5% OE H H L IN H L X OUT H L Z A1, A2 PERICOM P174ST1G126CEX TOSHIBA TC75Z126AFE MGN MARGIN VALUE
6 PIN SC70 PACKAGE OPTIONAL MARGINING CIRCUIT, IF NOT USED TIE THE MGN PINS TO VOUT
+ Value of BSEL Selection H - Value of BSEL Selection L VIN/2 No Margin
Figure 21. Four Phase in Parallel, 1.2V at 32A
+ -
R1 50k
A1 V+
VIN 3V TO 6.6V IOE IIN
4616fa
21
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LTM4616 APPLICATIONS INFORMATION
VIN 4V TO 5.5V 10F RUN ENABLE VIN1 SVIN1 RUN1 PLLLPF1 MODE1 PHMODE1 TRACK1 VIN2 10F SVIN2 RUN2 PLLLPF2 3.3V 10k MODE2 PHMODE2 TRACK2 3.16k SW2 SGND1 GND1 SGND2 GND2 LTM4616 SW1 CLKIN1 CLKOUT1 CLKIN2 CLKOUT2 VOUT1 FB1 ITH1 ITHM1 PGOOD1 BSEL1 MGN1 VOUT2 FB2 ITH2 ITHM2 PGOOD2 BSEL2 MGN2 3.16k 100F VOUT2 2.5V/8A 2.21k 100F VOUT1 3.3V/7A
VIN1 10F SVIN1 RUN1
SW1
CLKIN1
CLKOUT1 CLKIN2
CLKOUT2
VOUT1 FB1 ITH1 ITHM1 PGOOD1 BSEL1 4.99k 100F
VOUT3 1.8V/8A 100F
PLLLPF1 3.3V 10k MODE1 PHMODE1 TRACK1 4.99k 10F VIN2 SVIN2 RUN2 PLLLPF2 3.3V 10k MODE2 PHMODE2 TRACK2 6.65k SW2 SGND1 GND1 SGND2 GND2 LTM4616
MGN1 VOUT2 FB2 ITH2 ITHM2 PGOOD2 BSEL2 MGN2
4616 F22
VOUT4 1.5V/8A 100F 6.65k 100F
Figure 22. 4-Phase, Four Outputs (3.3V, 2.5V, 1.8V and 1.5V) with Tracking
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22
DETAIL A X Y M L K J H 15 BSC MOLD CAP SUBSTRATE 13.97 BSC G F E D C B A PADS SEE NOTES 12 11 10 9 8 3 DETAIL B 1.9050 3.1750 4.4450 5.7150 6.9850 0.630 0.025 SQ. 143x eee S X Y 7 6 5 4 3 2 1 DIA 0.630 PAD 1 2.72 - 2.92 0.12 - 0.28 13.97 BSC 3x, C (0.22 x45)
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PACKAGE DESCRIPTION
aaa Z
15 BSC
0.27 - 0.37 2.45 - 2.55 DETAIL B bbb Z Z
PAD 1 CORNER
1.27 BSC
4
aaa Z
PACKAGE TOP VIEW
PACKAGE BOTTOM VIEW
6.9850
5.7150
4.4450
3.1750
1.9050
6.9850
5.7150
4.4450 DETAIL A
LGA Package 144-Lead (15mm x 15mm x 2.82mm)
(Reference LTC DWG # 05-08-1816 Rev A)
3.1750
1.9050
0.6350 0.0000 0.6350
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 4 LAND DESIGNATION PER JESD MO-222, SPP-010
LTMXXXXXX mModule
COMPONENT PIN "A1"
0.6350 0.0000 0.6350
1.9050
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 144 SYMBOL TOLERANCE aaa 0.10 bbb 0.10 eee 0.05
TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION
LGA 144 0308 REV A
3.1750
4.4450
5.7150
6.9850
SUGGESTED PCB LAYOUT TOP VIEW
LTM4616
23
4616fa
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LTM4616
Pin Assignment Table (Arranged by Pin Number)
PIN NAME A1 A2 A3 A4 A5 A6 A7 A8 A9 GND1 GND1 GND1 GND1 GND1 BSEL1 CLKIN1 MODE1 PHMODE1 PIN NAME B1 B2 B3 B4 B5 B6 B7 B8 B9 GND1 GND1 GND1 GND1 GND1 SW1 GND1 GND1 GND1 PIN NAME C1 C2 C3 C4 C5 C6 C7 C8 C9 VIN1 VIN1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 PIN NAME D1 D2 D3 D4 D5 D6 D7 D8 D9 VIN1 VIN1 GND1 GND1 GND1 GND1 GND1 FB1 VOUT1 E1 E2 E3 E4 E5 E6 E7 E8 E9 PIN NAME VIN1 VIN1 VIN1 VIN1 SVIN1 ITHM1 TRACK1 VOUT1 F1 F2 F3 F4 F5 F7 F8 F9 PIN NAME VIN1 VIN1 VIN1 VIN1 SGND1 RUN1 CLKOUT1 ITH1 VOUT1
PACKAGE DESCRIPTION
PLLFLTR1 F6
A10 MGN1 A11 PGOOD1 A12 GND1 PIN NAME G1 G2 G3 G4 G5 G6 G7 G8 G9 GND2 GND2 GND2 GND2 GND2 BSEL2 CLKIN2 MODE2 PHMODE2
B10 GND1 B11 GND1 B12 GND1 PIN NAME H1 H2 H3 H4 H5 H6 H7 H8 H9 GND2 GND2 GND2 GND2 GND2 SW2 GND2 GND2 GND2
C10 GND1 C11 GND1 C12 GND1 PIN NAME J1 J2 J3 J4 J5 J6 J7 J8 J9 VIN2 VIN2 GND2 GND2 GND2 GND2 GND2 GND2 GND2
D10 VOUT1 D11 VOUT1 D12 VOUT1 PIN NAME K1 K2 K3 K4 K5 K6 K7 K8 K9 VIN2 VIN2 GND2 GND2 GND2 GND2 GND2 FB2 VOUT2
E10 VOUT1 E11 VOUT1 E12 VOUT1 PIN NAME L1 L2 L3 L4 L5 L6 L7 L8 L9 VIN2 VIN2 VIN2 VIN2 SVIN2 ITHM2 TRACK2 VOUT2
F10 VOUT1 F11 VOUT1 F12 VOUT1 PIN NAME M1 M2 M3 M4 M5 M7 M8 M9 VIN2 VIN2 VIN2 VIN2 SGND2 RUN2 CLKOUT2 ITH2 VOUT2
PLLFLTR2 M6
G10 MGN2 G11 PGOOD2 G12 GND2
H10 GND2 H11 GND2 H12 GND2
J10 GND2 J11 GND2 J12 GND2
K10 VOUT2 K11 VOUT2 K12 VOUT2
L10 VOUT2 L11 VOUT2 L12 VOUT2
M10 VOUT2 M11 VOUT2 M12 VOUT2
RELATED PARTS
PART NUMBER LTC2900 LTM4600 LTM4600HVMP LTM4601/ LTM4601A LTM4602 LTM4603 LTM4604A LTM4608A DESCRIPTION Quad Supply Monitor with Adjustable Reset Timer 10A DC/DC Module Military Plastic 10A DC/DC Module 12A DC/DC Module with PLL, Output Tracking/ Margining and Remote Sensing 6A DC/DC Module COMMENTS Monitors Four Supplies; Adjustable Reset Timer Basic 10A DC/DC Module, LGA Package Guaranteed Operation from -55C to 125C Ambient, LGA Package Synchronizable, PolyPhase Operation, LTM4601-1/LTM4601A-1 Version has no Remote Sensing, LGA Package Pin Compatible with the LTM4600, LGA Package
6A DC/DC Module with PLL and Outpupt Tracking/ Synchronizable, PolyPhase Operation, LTM4603-1 Version has no Remote Margining and Remote Sensing Sensing, Pin Compatible with the LTM4601, LGA Package Low VIN 4A DC/DC Module Low VIN 8A DC/DC Module 2.375V VIN 5.5V, 0.8V VOUT 5V, 9mm x 15mm x 2.3mm LGA Package 2.7V VIN 5.5V; 0.6V VOUT 5V; 9mm x 15mm x 2.8mm LGA Package Pin Compatible; 4.5V VIN 36V; 9mm x 11.25mm x 2.8mm LGA Package
4616fa LT 1108 REV A * PRINTED IN USA
LTM8022/LTM8023 36VIN, 1A and 2A DC/DC Module
24 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2008

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